- Neologically raises $ 10 million to promote CMOS+ CPUs, reducing the circulatory complexity
- CMOS+ activates 6-32 input ports, reducing power consumption and door size
- First processors are expected in 2026, targeting energy -efficient AI -DATACENTER Workload
Neologic has collected $ 10 million in Serie A financing as it works to change how processors are designed.
Founded in 2021, the Israel-based company (with an American presence planned for the future) does not focus on transistor scaling, the traditional path of the semiconductor industry, but rather on reducing the complexity of the circuit.
Its CMOS+ technology integrates standard CMOS ports with reduced complexity ports and cuts transistor counts with as much as three times at any process node.
Up to 50% lower energy consumption
Conventional CMOs are limited by fan-in, with gates that typically handle no more than four inputs.
Designers depend on wooden structures to handle higher inputs, which increases both chip area and power use.
Neologics CMOS+ enables single steps that handle between 6 and 32 inputs, which shortens the critical path while reducing area and energy consumption.
The company says processors built with CMOS+can lower the power use by up to 50 percent and reduce the chip area by up to 40 percent while keeping latency at the level of current design.
These improvements are compatible with existing CMOS making processes, from 130 Nm down to 2nm, as well as standard EDA tools, so adoption does not require new infrastructure.
By cutting nozzle size and improving yields, CMOS+ provides cost benefits of advanced nodes where disc costs and development costs increase sharply.
However, it is more than just gates, as CMOS+ also offers stream -efficient registers, buffers and arithmetic blocks. Together, says Neologic, these elements give chip designers a new infrastructure that simplifies process word design while achieving better power and the area’s change.
“We support neological as they push the boundaries of calculation with their breakthrough method for energy -efficient processors,” said Talia Rafaeli, partner at Kompas VC, who led the latest financing round. “The team’s deep technical expertise and innovative CMOS+ technology place them to influence the AI Data Center significantly.”
Neologic looks CMOS+ as a way to deliver more effective computing without leaving established tools and processes. It has begun to demonstrate its first processors to customers and expect implementation in data centers starting in 2026.
Via Eeneews embedded
